提交 5fd61b02ce4f3d28f953bc26429e9db100b57687

作者 shengdong.dsd
1 个父辈 80cf9929

update for board amebaz_dev ota failed from V1.0.0 to V1.1.0

... ... @@ -16,6 +16,9 @@ GLOBAL_DEFINES += STDIO_UART=0
16 16 CONFIG_SYSINFO_PRODUCT_MODEL := ALI_AOS_AMEBAZ
17 17 CONFIG_SYSINFO_DEVICE_NAME := AMEBAZ
18 18  
  19 +CONFIG_BOARD_NAME = AMEBAZ
  20 +$(info CONFIG_BOARD_NAME : $(CONFIG_BOARD_NAME))
  21 +GLOBAL_DEFINES += BOARD_NAME=AMEBAZ
19 22  
20 23 GLOBAL_CFLAGS += -DSYSINFO_PRODUCT_MODEL=\"$(CONFIG_SYSINFO_PRODUCT_MODEL)\"
21 24 GLOBAL_CFLAGS += -DSYSINFO_DEVICE_NAME=\"$(CONFIG_SYSINFO_DEVICE_NAME)\"
... ... @@ -27,6 +30,5 @@ GLOBAL_CFLAGS += -DSYSINFO_DEVICE_NAME=\"$(CONFIG_SYSINFO_DEVICE_NAME)\"
27 30  
28 31  
29 32 # Extra build target in mico_standard_targets.mk, include bootloader, and copy output file to eclipse debug file (copy_output_for_eclipse)
30   -#EXTRA_TARGET_MAKEFILES += $(SOURCE_ROOT)/platform/mcu/$(HOST_MCU_FAMILY)/download.mk
31   -#EXTRA_TARGET_MAKEFILES += $(SOURCE_ROOT)/platform/mcu/$(HOST_MCU_FAMILY)/gen_crc_bin.mk
32   -EXTRA_TARGET_MAKEFILES += $(SOURCE_ROOT)/platform/mcu/$(HOST_MCU_FAMILY)/pick.mk
  33 +EXTRA_TARGET_MAKEFILES += $(SOURCE_ROOT)/platform/mcu/$(HOST_MCU_FAMILY)/download.mk
  34 +EXTRA_TARGET_MAKEFILES += $(SOURCE_ROOT)/platform/mcu/$(HOST_MCU_FAMILY)/gen_crc_bin.mk
... ...
... ... @@ -13,7 +13,7 @@ const hal_logic_partition_t hal_partitions[] =
13 13 {
14 14 .partition_owner = HAL_FLASH_EMBEDDED,
15 15 .partition_description = "Bootloader",
16   - .partition_start_addr = 0x0000B000,
  16 + .partition_start_addr = 0x0,
17 17 .partition_length = 0x8000, //32k bytes
18 18 .partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_DIS,
19 19 },
... ... @@ -21,8 +21,8 @@ const hal_logic_partition_t hal_partitions[] =
21 21 {
22 22 .partition_owner = HAL_FLASH_EMBEDDED,
23 23 .partition_description = "Application",
24   - .partition_start_addr = 0x13000,
25   - .partition_length = 0xB5000, //724k bytes
  24 + .partition_start_addr = 0xB000,
  25 + .partition_length = 0xF2000, //568k bytes
26 26 .partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
27 27 },
28 28  
... ... @@ -30,8 +30,8 @@ const hal_logic_partition_t hal_partitions[] =
30 30 {
31 31 .partition_owner = HAL_FLASH_EMBEDDED,
32 32 .partition_description = "PARAMETER1",
33   - .partition_start_addr = 0x000C8000,
34   - .partition_length = 0x4000, // 16k bytes
  33 + .partition_start_addr = 0xFD000,
  34 + .partition_length = 0x1000, // 4k bytes
35 35 .partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
36 36 },
37 37  
... ... @@ -39,34 +39,24 @@ const hal_logic_partition_t hal_partitions[] =
39 39 {
40 40 .partition_owner = HAL_FLASH_EMBEDDED,
41 41 .partition_description = "PARAMETER2",
42   - .partition_start_addr = 0x000CC000,
43   - .partition_length = 0x4000, // 16k bytes
  42 + .partition_start_addr = 0xFE000,
  43 + .partition_length = 0x2000, // 8k bytes
44 44 .partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
45 45 },
46 46  
47   -#if 0
48   - [HAL_PARTITION_ATE] =
49   - {
50   - .partition_owner = HAL_FLASH_EMBEDDED,
51   - .partition_description = "ATE",
52   - .partition_start_addr = 0x000D0000,
53   - .partition_length = 0x40000, //256k bytes
54   - .partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
55   - },
56   -#endif
57 47 [HAL_PARTITION_OTA_TEMP] =
58 48 {
59 49 .partition_owner = HAL_FLASH_EMBEDDED,
60 50 .partition_description = "OTA Storage",
61   - .partition_start_addr = 0x00110000,
62   - .partition_length = 0xB5000, //724k bytes
  51 + .partition_start_addr = 0x100000,
  52 + .partition_length = 0xF2000, //568k bytes
63 53 .partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
64 54 },
65 55 [HAL_PARTITION_PARAMETER_3] =
66 56 {
67 57 .partition_owner = HAL_FLASH_EMBEDDED,
68 58 .partition_description = "PARAMETER3",
69   - .partition_start_addr = 0x001C5000,
  59 + .partition_start_addr = 0x1FD000,
70 60 .partition_length = 0x1000, // 4k bytes
71 61 .partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
72 62 },
... ... @@ -74,12 +64,14 @@ const hal_logic_partition_t hal_partitions[] =
74 64 {
75 65 .partition_owner = HAL_FLASH_EMBEDDED,
76 66 .partition_description = "PARAMETER4",
77   - .partition_start_addr = 0x001C6000,
78   - .partition_length = 0x1000,// 4k bytes
  67 + .partition_start_addr = 0x1FE000,
  68 + .partition_length = 0x2000,// 8k bytes
79 69 .partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
80 70 },
81 71 };
82 72  
  73 +
  74 +
83 75 void board_init(void)
84 76 {
85 77 }
... ...
不能预览此文件类型
... ... @@ -82,8 +82,13 @@ tick_t soc_elapsed_ticks_get(void)
82 82 uint8_t g_heap_buf[HEAP_BUFFER_SIZE];
83 83 k_mm_region_t g_mm_region[] = {{g_heap_buf, HEAP_BUFFER_SIZE}, {(uint8_t *)0x10000000, 0x8000}};
84 84 #else
85   -
  85 +#if (BOARD_NAME == AMEBAZ)
  86 +k_mm_region_t g_mm_region[] = {{(uint8_t*)&heap_start,(size_t)&heap_len},
  87 + {(uint8_t*)MM_ALIGN_UP(0x100014f9), MM_ALIGN_DOWN(0xb07)},
  88 + {(uint8_t*)MM_ALIGN_UP(0x10002475), MM_ALIGN_DOWN(0x2b8b)}};
  89 +#else
86 90 k_mm_region_t g_mm_region[] = {{(uint8_t*)&heap_start,(size_t)&heap_len},{(uint8_t*)0x10005000, (size_t)0x8000}};
  91 +#endif
87 92  
88 93 #endif
89 94 int g_region_num = sizeof(g_mm_region)/sizeof(k_mm_region_t);
... ...
... ... @@ -117,7 +117,12 @@ GLOBAL_CFLAGS += -w
117 117  
118 118 GLOBAL_LDFLAGS += -L $(SOURCE_ROOT)/platform/mcu/rtl8710bn
119 119 #GLOBAL_LDFLAGS += -I $(SOURCE_ROOT)/platform/mcu/rtl8710bn
120   -GLOBAL_LDFLAGS += -T $(SOURCE_ROOT)/platform/mcu/rtl8710bn/script/rlx8711B-symbol-v02-img2_xip1.ld
  120 +ifeq ($(CONFIG_BOARD_NAME), AMEBAZ)
  121 +# GLOBAL_LDFLAGS += -T $(SOURCE_ROOT)/platform/mcu/rtl8710bn/script/rlx8711B-symbol-v02-img2_xip1.ld
  122 +else
  123 +GLOBAL_LDFLAGS += -T $(SOURCE_ROOT)/platform/mcu/rtl8710bn/script/rlx8711B-symbol-v02-img2_xip1_mxchip.ld
  124 +endif
  125 +
121 126 #GLOBAL_LDFLAGS += $(SOURCE_ROOT)/platform/mcu/rtl8710bn/bin/boot_all.o
122 127 GLOBAL_LDFLAGS += -L$(SOURCE_ROOT)/platform/mcu/rtl8710bn/lib/ -l_platform -l_wlan -l_wps -l_p2p -l_rtlstd
123 128  
... ... @@ -170,8 +175,13 @@ $(NAME)_SOURCES := aos/soc_impl.c \
170 175 hal/hw.c \
171 176 hal/wifi_port.c \
172 177 hal/gpio.c \
173   - hal/wdg.c \
174   - hal/ota.c
  178 + hal/wdg.c
  179 +
  180 +ifeq ($(CONFIG_BOARD_NAME), AMEBAZ)
  181 +$(NAME)_SOURCES += hal/ota_port.c
  182 +else
  183 +$(NAME)_SOURCES += hal/ota.c
  184 +endif
175 185  
176 186 #$(NAME)_SOURCES += hal/uart.c
177 187 #$(NAME)_SOURCES += hal/flash.c
... ... @@ -185,3 +195,13 @@ $(NAME)_SOURCES += hal/pwrmgmt_hal/board_cpu_pwr.c
185 195  
186 196  
187 197 #$(NAME)_COMPONENTS += platform/mcu/rtl8710bn/peripherals
  198 +
  199 +ifeq ($(CONFIG_BOARD_NAME), AMEBAZ)
  200 +PING_PONG_OTA := 1
  201 +ifeq ($(PING_PONG_OTA),1)
  202 +AOS_IMG1_XIP1_LD_FILE += platform/mcu/rtl8710bn/script/rlx8711B-symbol-v02-img2_xip1.ld
  203 +AOS_IMG2_XIP2_LD_FILE += platform/mcu/rtl8710bn/script/rlx8711B-symbol-v02-img2_xip2.ld
  204 +else
  205 +GLOBAL_LDS_FILES += platform/mcu/rtl8710bn/script/rlx8711B-symbol-v02-img2_xip1.ld
  206 +endif
  207 +endif
... ...
... ... @@ -17,7 +17,7 @@ MEMORY
17 17 ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000 /* ROM: 512k */
18 18 ROMBSS_RAM (rw) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* ROM BSS RAM: 8K */
19 19 BOOTLOADER_RAM (rwx) : ORIGIN = 0x10002000, LENGTH = 0x3000 /* BOOT Loader RAM: 12K */
20   - BD_RAM (rwx) : ORIGIN = 0x1000D000, LENGTH = 0x39000 /* MAIN RAM: 228 */
  20 + BD_RAM (rwx) : ORIGIN = 0x10005000, LENGTH = 0x38000 /* MAIN RAM: 228 */
21 21 ROM_BSS_RAM (rwx) : ORIGIN = 0x1003D000, LENGTH = 0x1000 /* ROM BSS RAM: 4K */
22 22 MSP_RAM (wx) : ORIGIN = 0x1003E000, LENGTH = 0x1000 /* MSP RAM: 4k */
23 23 RDP_RAM (wx) : ORIGIN = 0x1003F000, LENGTH = 0xFF0 /* RDP RAM: 4k-0x10 */
... ... @@ -25,8 +25,8 @@ MEMORY
25 25 XIPBOOT (rx) : ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20 /* XIPBOOT: 32k, 32 Bytes resvd for header*/
26 26 XIPSYS (r) : ORIGIN = 0x08009000, LENGTH = 0x1000 /* XIPSYS: 4K system data in flash */
27 27 XIPCAL (r) : ORIGIN = 0x0800A000, LENGTH = 0x1000 /* XIPCAL: 4K calibration data in flash */
28   - XIP1 (rx) : ORIGIN = 0x08013000+0x20, LENGTH = 0xB5000-0x20 /* XIP1: 968k, 32 Bytes resvd for header */
29   - XIP2 (rx) : ORIGIN = 0x08100000+0x20, LENGTH = 0xF2000-0x20 /* XIP2: 968k, 32 Bytes resvd for header */
  28 + XIP1 (rx) : ORIGIN = 0x0800B000+0x20, LENGTH = 0xF2000-0x20 /* XIP1: 968k, 32 Bytes resvd for header */
  29 + XIP2 (rx) : ORIGIN = 0x08100000+0x20, LENGTH = 0xF2000-0x20 /* XIP2: 968k, 32 Bytes resvd for header */
30 30 }
31 31  
32 32  
... ...
  1 +
  2 +
  3 +ENTRY(Reset_Handler)
  4 +
  5 +INCLUDE "script/export-rom_symbol_v01.txt"
  6 +
  7 +GROUP (
  8 + libgcc.a
  9 + libc.a
  10 + libg.a
  11 + libm.a
  12 + libnosys.a
  13 +)
  14 +
  15 +MEMORY
  16 +{
  17 + ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000 /* ROM: 512k */
  18 + ROMBSS_RAM (rw) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* ROM BSS RAM: 8K */
  19 + BOOTLOADER_RAM (rwx) : ORIGIN = 0x10002000, LENGTH = 0x3000 /* BOOT Loader RAM: 12K */
  20 + BD_RAM (rwx) : ORIGIN = 0x1000D000, LENGTH = 0x39000 /* MAIN RAM: 228 */
  21 + ROM_BSS_RAM (rwx) : ORIGIN = 0x1003D000, LENGTH = 0x1000 /* ROM BSS RAM: 4K */
  22 + MSP_RAM (wx) : ORIGIN = 0x1003E000, LENGTH = 0x1000 /* MSP RAM: 4k */
  23 + RDP_RAM (wx) : ORIGIN = 0x1003F000, LENGTH = 0xFF0 /* RDP RAM: 4k-0x10 */
  24 +
  25 + XIPBOOT (rx) : ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20 /* XIPBOOT: 32k, 32 Bytes resvd for header*/
  26 + XIPSYS (r) : ORIGIN = 0x08009000, LENGTH = 0x1000 /* XIPSYS: 4K system data in flash */
  27 + XIPCAL (r) : ORIGIN = 0x0800A000, LENGTH = 0x1000 /* XIPCAL: 4K calibration data in flash */
  28 + XIP1 (rx) : ORIGIN = 0x08013000+0x20, LENGTH = 0xB5000-0x20 /* XIP1: 968k, 32 Bytes resvd for header */
  29 + XIP2 (rx) : ORIGIN = 0x08100000+0x20, LENGTH = 0xF2000-0x20 /* XIP2: 968k, 32 Bytes resvd for header */
  30 +}
  31 +
  32 +
  33 +
  34 +SECTIONS
  35 +{
  36 + .rom.text : { } > ROM
  37 + .rom.rodata : { } > ROM
  38 + .ARM.exidx :
  39 + {
  40 + __exidx_start = .;
  41 + *(.ARM.exidx*)
  42 + *(.gnu.linkonce.armexidx.*)
  43 + __exidx_end = .;
  44 + } > ROM
  45 + .hal.rom.bss : { } > ROMBSS_RAM
  46 +
  47 + /* image1 entry, this section should in RAM and fixed address for ROM */
  48 + .ram_image1.entry :
  49 + {
  50 + __ram_image1_text_start__ = .;
  51 + __ram_start_table_start__ = .;
  52 + KEEP(*(SORT(.image1.entry.data*)))
  53 + __ram_start_table_end__ = .;
  54 +
  55 + __image1_validate_code__ = .;
  56 + KEEP(*(.image1.validate.rodata*))
  57 + KEEP(*(.image1.export.symb*))
  58 + } > BOOTLOADER_RAM
  59 +
  60 + /* Add . to assign the start address of the section */
  61 + /* to prevent the change of the start address by ld doing section alignment */
  62 + .ram_image1.text . :
  63 + {
  64 + /* image1 text */
  65 + *(.boot.ram.text*)
  66 + *(.boot.rodata*)
  67 + } > BOOTLOADER_RAM
  68 +
  69 + .ram_image1.data . :
  70 + {
  71 + __ram_image1_data_start__ = .;
  72 + KEEP(*(.boot.ram.data*))
  73 + __ram_image1_data_end__ = .;
  74 +
  75 + __ram_image1_text_end__ = .;
  76 + } > BOOTLOADER_RAM
  77 +
  78 + .ram_image1.bss . :
  79 + {
  80 + __image1_bss_start__ = .;
  81 + KEEP(*(.boot.ram.bss*))
  82 + KEEP(*(.boot.ram.end.bss*))
  83 + __image1_bss_end__ = .;
  84 + } > BOOTLOADER_RAM
  85 +
  86 + .ram_image2.entry :
  87 + {
  88 + __ram_image2_text_start__ = .;
  89 + __image2_entry_func__ = .;
  90 + KEEP(*(SORT(.image2.entry.data*)))
  91 +
  92 + __image2_validate_code__ = .;
  93 + KEEP(*(.image2.validate.rodata*))
  94 +
  95 + } > BD_RAM
  96 +
  97 + .ram_image2.text :
  98 + {
  99 + KEEP(*(.image2.ram.text*))
  100 + } > BD_RAM
  101 +
  102 + .ram_image2.data :
  103 + {
  104 + __data_start__ = .;
  105 + *(.data*)
  106 + __data_end__ = .;
  107 + __ram_image2_text_end__ = .;
  108 + . = ALIGN(16);
  109 + } > BD_RAM
  110 +
  111 + .ram_image2.bss :
  112 + {
  113 + __bss_start__ = .;
  114 + *(.bss*)
  115 + *(COMMON)
  116 + } > BD_RAM
  117 +
  118 + .ram_image2.skb.bss :
  119 + {
  120 + *(.bdsram.data*)
  121 + __bss_end__ = .;
  122 + } > BD_RAM
  123 +
  124 + .ram_heap.data :
  125 + {
  126 + *(.bfsram.data*)
  127 + } > BD_RAM
  128 +
  129 + . = ALIGN(8);
  130 + PROVIDE(heap_start = .);
  131 + PROVIDE(heap_end = 0x1003CFFF);
  132 + PROVIDE(heap_len = heap_end - heap_start);
  133 +
  134 + .rom.bss :
  135 + {
  136 + *(.heap.stdlib*)
  137 + } > ROM_BSS_RAM
  138 +
  139 + .ram_rdp.text :
  140 + {
  141 + __rom_top_4k_start_ = .;
  142 + __rdp_text_start__ = .;
  143 + KEEP(*(.rdp.ram.text*))
  144 + KEEP(*(.rdp.ram.data*))
  145 + __rdp_text_end__ = .;
  146 + . = ALIGN(16);
  147 +
  148 + } > RDP_RAM
  149 +
  150 + .xip_image1.text :
  151 + {
  152 + __flash_boot_text_start__ = .;
  153 +
  154 + *(.flashboot.text*)
  155 +
  156 + __flash_boot_text_end__ = .;
  157 +
  158 + . = ALIGN(16);
  159 + } > XIPBOOT
  160 +
  161 + .xip_image2.text :
  162 + {
  163 + __flash_text_start__ = .;
  164 +
  165 + *(.img2_custom_signature*)
  166 + *(.text)
  167 + *(.text*)
  168 + *(.rodata)
  169 + *(.rodata*)
  170 + *(.debug_trace*)
  171 +
  172 + __flash_text_end__ = .;
  173 +
  174 + . = ALIGN (16);
  175 + } > XIP1
  176 +}
  177 +
  178 +SECTIONS
  179 +{
  180 + /* Bootloader symbol list */
  181 + boot_export_symbol = 0x10002020;
  182 +}
... ...